JPH0258779B2 - - Google Patents

Info

Publication number
JPH0258779B2
JPH0258779B2 JP57064839A JP6483982A JPH0258779B2 JP H0258779 B2 JPH0258779 B2 JP H0258779B2 JP 57064839 A JP57064839 A JP 57064839A JP 6483982 A JP6483982 A JP 6483982A JP H0258779 B2 JPH0258779 B2 JP H0258779B2
Authority
JP
Japan
Prior art keywords
silicon
layer
polysilicon
ribbon
silicon dioxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57064839A
Other languages
English (en)
Japanese (ja)
Other versions
JPS586122A (ja
Inventor
Heruberuto Shutsutake Gyuntaa
Eichi Yangu Kyuei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS586122A publication Critical patent/JPS586122A/ja
Publication of JPH0258779B2 publication Critical patent/JPH0258779B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76248—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using lateral overgrowth techniques, i.e. ELO techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Recrystallisation Techniques (AREA)
JP57064839A 1981-06-30 1982-04-20 半導体モノリシツク構造体 Granted JPS586122A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US280148 1981-06-30
US06/280,148 US4494300A (en) 1981-06-30 1981-06-30 Process for forming transistors using silicon ribbons as substrates

Publications (2)

Publication Number Publication Date
JPS586122A JPS586122A (ja) 1983-01-13
JPH0258779B2 true JPH0258779B2 (en]) 1990-12-10

Family

ID=23071886

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57064839A Granted JPS586122A (ja) 1981-06-30 1982-04-20 半導体モノリシツク構造体

Country Status (4)

Country Link
US (1) US4494300A (en])
EP (1) EP0068094B1 (en])
JP (1) JPS586122A (en])
DE (1) DE3278843D1 (en])

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59205712A (ja) * 1983-04-30 1984-11-21 Fujitsu Ltd 半導体装置の製造方法
US4619034A (en) * 1983-05-02 1986-10-28 Ncr Corporation Method of making laser recrystallized silicon-on-insulator nonvolatile memory device
JPS6089953A (ja) * 1983-10-22 1985-05-20 Agency Of Ind Science & Technol 積層型半導体装置の製造方法
JPH0712086B2 (ja) * 1984-01-27 1995-02-08 株式会社日立製作所 ダイヤフラムセンサの製造方法
JPS60185049A (ja) * 1984-02-29 1985-09-20 Matsushita Electric Ind Co Ltd 瞬間湯沸器
FR2572219B1 (fr) * 1984-10-23 1987-05-29 Efcis Procede de fabrication de circuits integres sur substrat isolant
JPS61256663A (ja) * 1985-05-09 1986-11-14 Agency Of Ind Science & Technol 半導体装置
JPS62177909A (ja) * 1986-01-31 1987-08-04 Hitachi Ltd 半導体装置の製造方法
JPS62206816A (ja) * 1986-03-07 1987-09-11 Agency Of Ind Science & Technol 半導体結晶層の製造方法
US4753895A (en) * 1987-02-24 1988-06-28 Hughes Aircraft Company Method of forming low leakage CMOS device on insulating substrate
WO1989002095A1 (en) * 1987-08-27 1989-03-09 Hughes Aircraft Company Lcmos displays fabricated with implant treated silicon wafers
US4839707A (en) * 1987-08-27 1989-06-13 Hughes Aircraft Company LCMOS displays fabricated with implant treated silicon wafers
US5372836A (en) * 1992-03-27 1994-12-13 Tokyo Electron Limited Method of forming polycrystalling silicon film in process of manufacturing LCD
US7319504B2 (en) * 2005-01-27 2008-01-15 Hannstar Display Corp. Method of repairing a liquid crystal display panel
JP4453021B2 (ja) * 2005-04-01 2010-04-21 セイコーエプソン株式会社 半導体装置の製造方法及び半導体製造装置
DE102006034786B4 (de) 2006-07-27 2011-01-20 Siltronic Ag Monokristalline Halbleiterscheibe mit defektreduzierten Bereichen und Verfahren zur Ausheilung GOI-relevanter Defekte in einer monokristallinen Halbleiterscheibe
JP4407685B2 (ja) * 2006-10-11 2010-02-03 セイコーエプソン株式会社 半導体装置の製造方法および電子機器の製造方法
JP4362834B2 (ja) * 2006-10-11 2009-11-11 セイコーエプソン株式会社 半導体装置の製造方法、電子機器の製造方法および半導体製造装置
CN109406555B (zh) * 2018-10-15 2021-12-07 上海华力微电子有限公司 一种样品去层次方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3574007A (en) * 1967-07-19 1971-04-06 Frances Hugle Method of manufacturing improved mis transistor arrays
US3514676A (en) * 1967-10-25 1970-05-26 North American Rockwell Insulated gate complementary field effect transistors gate structure
US3585088A (en) * 1968-10-18 1971-06-15 Ibm Methods of producing single crystals on supporting substrates
US4059461A (en) * 1975-12-10 1977-11-22 Massachusetts Institute Of Technology Method for improving the crystallinity of semiconductor films by laser beam scanning and the products thereof
US4116641A (en) * 1976-04-16 1978-09-26 International Business Machines Corporation Apparatus for pulling crystal ribbons from a truncated wedge shaped die
US4075055A (en) * 1976-04-16 1978-02-21 International Business Machines Corporation Method and apparatus for forming an elongated silicon crystalline body using a <110>{211}orientated seed crystal
US4198246A (en) * 1978-11-27 1980-04-15 Rca Corporation Pulsed laser irradiation for reducing resistivity of a doped polycrystalline silicon film
US4272880A (en) * 1979-04-20 1981-06-16 Intel Corporation MOS/SOS Process

Also Published As

Publication number Publication date
EP0068094A3 (en) 1985-09-11
EP0068094B1 (en) 1988-07-27
JPS586122A (ja) 1983-01-13
US4494300A (en) 1985-01-22
EP0068094A2 (en) 1983-01-05
DE3278843D1 (en) 1988-09-01

Similar Documents

Publication Publication Date Title
JPH0258779B2 (en])
EP0085434B1 (en) Semiconductor devices and method for making the same
CA1197628A (en) Fabrication of stacked mos devices
US5294556A (en) Method for fabricating an SOI device in alignment with a device region formed in a semiconductor substrate
US4725561A (en) Process for the production of mutually electrically insulated monocrystalline silicon islands using laser recrystallization
TW595003B (en) Thin-film transistor and method for manufacturing same
JPH0410216B2 (en])
US5433168A (en) Method of producing semiconductor substrate
Jastrzebski Silicon on insulators: Different approaches-A review
JPH0132648B2 (en])
Kawamura et al. Laser recrystallization of Si over SiO2 with a heat‐sink structure
JPH0249276B2 (en])
US4678538A (en) Process for the production of an insulating support on an oriented monocrystalline silicon film with localized defects
JP2004119636A (ja) 半導体装置およびその製造方法
JP2718074B2 (ja) 薄膜半導体層の形成方法
JPH01214110A (ja) 半導体装置の製造方法
JPH06132218A (ja) 半導体結晶の成長方法及びｍｏｓ型トランジスタの作製方法
JP2773203B2 (ja) 半導体装置の製造方法
JPS63174308A (ja) 半導体薄膜結晶層の製造方法
JPS6159818A (ja) 半導体装置の製造方法
JPS6043814A (ja) 半導体結晶薄膜の製造方法
JPH04373171A (ja) 半導体素子の作製方法
JPH077829B2 (ja) 半導体装置およびその製法
JPS61116821A (ja) 単結晶薄膜の形成方法
JPH0228560B2 (ja) Tanketsushoshirikonmakukeiseiho